LOTFI, Ali, SHAHBAZI, Mahmoud, ISSA, Walid, WHEELER, Patrick, SEKIYA, Hiroo, KAZIMIERCZUK, Marian K. and BLAABJERG, Frede (2023). Steady-state analysis of class-E/F n inverter with MOSFET nonlinear output capacitance at any grading coefficient. IEEE Access. [Article]
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32324:620976
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Issa-Steady-StateAnalysis(AM).pdf - Accepted Version
Available under License Creative Commons Attribution Non-commercial No Derivatives.
Issa-Steady-StateAnalysis(AM).pdf - Accepted Version
Available under License Creative Commons Attribution Non-commercial No Derivatives.
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Abstract
In this paper, the analysis and design of a class-E/F n inverter using analytically expressions is provided for any grading coefficient m of the MOSFET body junction diode at 50% duty ratio. Generally, the class-E zero-voltage switching (ZVS) and zero-derivative voltage switching (ZDVS) conditions prepared the switch-mode operation inverter to obtain high power conversion efficiency performance. On the other hand, harmonics tuning and waveforms shaping in the load-network lead to the class-F inverter configuration. The combination of the switch-mode operating with waveforms shaping provides the class E/F n inverter. The MOSFET nonlinear drain-source parasitic capacitance is highlighted as determinative element in this operation mode. The nonlinearity characteristic of the MOSFET drain-source parasitic capacitance is required to include as the design specification for the satisfaction of the peak switch voltage and output power simultaneously. Furthermore, the grading coefficient m has considerably and directly made effects on both the output power capability and maximum operating frequency. The design and implementation of the class-E/F 3 inverter using the grading coefficient m as an adjustment parameter is performed. The close agreement between the analytical and PSpice simulations proved the effectiveness of the provided theoretical expressions. Therefore, the usefulness of analytical expressions is confirmed by high accuracy obtaining results from the laboratory measurements for the prototype fabricated circuit.
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