Items where Author is "Garcia, Paulo"

GARCIA, Paulo, BHOWMIK, Deepayan, STEWART, Robert, MICHAELSON, Greg and WALLACE, Andrew (2019). Optimized memory allocation and power minimization for FPGA-based image processing. Journal of Imaging, 5 (1), p. 7. [Article]

STEWART, Rob, DUNCAN, Kirsty, MICHAELSON, Greg, GARCIA, Paulo, BHOWMIK, Deepayan and WALLACE, Andrew (2018). RIPL: A Parallel Image Processing Language for FPGAs. ACM Transactions on Reconfigurable Technology and Systems (TRETS), 11 (1). [Article]

BHOWMIK, Deepayan, GARCIA, Paulo, WALLACE, Andrew, STEWART, Robert and MICHAELSON, Greg (2017). Power efficient dataflow design for a heterogeneous smart camera architecture. In: Design and Architectures for Signal and Image Processing (DASIP), 2017 Conference on. IEEE. [Book Section]

STEWART, Robert, MICHAELSON, Greg, BHOWMIK, Deepayan, GARCIA, Paulo and WALLACE, Andy (2016). A dataflow IR for memory efficient RIPL compilation to FPGAs. In: CARRETERO, Jesus, GARCIA-BLAS, Javier, GERGEL, Victor, VOEVODIN, Vladimir, MEYEROV, Iosif, RICO-GALLEGO, Juan A., DIAZ-MARTIN, Juan C., ALONSO, Pedro, DURILLO, Juan, GARCIA SANCHEZ, Jose Daniel, LASTOVETSKY, Alexey L., MAROZZO, Fabrizio, LIU, Qin, BHUIYAN, Zakirul Alam, FURLINGER, Karl, WEIDENDORFER, Josef and GARCIA, Jose, (eds.) Algorithms and architectures for parallel processing : ICA3PP 2016 Collocated Workshops: SCDT, TAPEMS, BigTrust, UCER, DLMCS, Granada, Spain, December 14-16, 2016, Proceedings. Lecture Notes in Computer Science (10049). Springer, 174-188. [Book Section]

GARCIA, Paulo, BHOWMIK, Deepayan, WALLACE, Andrew, STEWART, Robert and MICHAELSON, Greg (2018). Area-energy aware dataflow optimisation of visual tracking systems. In: 14th International Symposium on Applied Reconfigurable Computing (ARC), Santorini, Greece, 2-4 May, 2018. [Conference or Workshop Item]