SAAD, Sameh M, BAHADORI, Ramin and JAFARNEJAD, Hamidreza (2021). The smart SME technology readiness assessment methodology in the context of industry 4.0. Journal of Manufacturing Technology Management.
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28242:568771
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Abstract
Purpose
This study proposes the Smart SME Technology Readiness Assessment (SSTRA) methodology which aims to enable practitioners to assess the SMEs Industry 4.0 technology readiness throughout the end-to-end engineering across the entire value chain; the smart product design phase is the focus in this paper.
Design/methodology/approach
The proposed SSTRA utilises the analytic hierarchy process to prioritise smart SME requirements, a graphical interface which tracks technologies' benchmarks under Industry 4.0 Technology Readiness Levels (TRLs); a mathematical model used to determine the technology readiness and visual representation to understand the relative readiness of each smart main area. The validity of the SSTRA is confirmed by testing it in a real industrial environment. In addition, the conceptual model for Smart product design development is proposed and validated.
Findings
The proposed SSTRA offers decision-makers the facility to identify requirements and rank them to reflect the current priorities of the enterprise. It allows SMEs to assess their current capabilities in a range of technologies of high relevance to the Industry 4.0 area. The SSTRA assembles a readiness profile allowing decision-makers to not only perceive the overall score of technology readiness but also the distribution of technology readiness across the main smart areas. It helps to visualise strengths and weaknesses; whilst emphasising the fundamental gaps that require serious action to assist the program with a well-balanced effort towards a successful transition to Industry 4.0.
Originality/value
The SSTRA provides a step-by-step approach for decision-making based on data collection, analysis, visualisation and documentation. Hence, it greatly mitigates the risk of further Industry 4.0 technology investment and implementation.
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