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KELEFOURAS, Vasileios and DJEMAME, Karim (2018). A methodology for efficient code optimizations and memory management. In: Proceedings of the ACM International Conference on Computing Frontiers 2018. ACM, 105-112.

KELEFOURAS, Vasileios, KERAMIDAS, Georgios and VOROS, Nikolaos (2018). Combining software cache partitioning and loop tiling for effective shared cache management. ACM Transactions on Embedded Computing Systems, 17 (3).

KELEFOURAS, Vasileios, KERAMIDAS, Georgios and VOROS, Nikolaos (2017). Cache partitioning + loop tiling: A methodology for effective shared cache management. In: HÜBNER, Michael, REIS, Ricardo, STAN, Mircea and VOROS, Nikolaos, (eds.) 2017 IEEE Computer Society Annual Symposium on VLSI (ISVLSI) : Emerging VLSI technologies and architectures. Bochum, Germany, IEEE Computer Society, 477-482.

KELEFOURAS, Vasileios (2017). A methodology pruning the search space of six compiler transformations by addressing them together as one problem and by exploiting the hardware architecture details. Computing, 99 (9), 865-888.

KRITIKAKOU, Angeliki, CATTHOOR, Francky, KELEFOURAS, Vasileios and GOUTIS, Costas (2016). Array size computation under uniform overlapping and irregular accesses. ACM Transactions on Design Automation of Electronic Systems, 21 (2), 22:1-22:35.

KELEFOURAS, Vasileios, KRITIKAKOU, Angeliki, MPORAS, Iosif and VASILEIOS, Kolonias (2016). A high-performance matrix-matrix multiplication methodology for CPU and GPU architectures. Journal of Supercomputing, 72 (3), 804-844.

EMERETLIS, Andreas, KELEFOURAS, Vasileios, THEODORIDIS, George, NANOU, Maki, GEORGOULAKIS, Kwnstantinos and GLENTIS, Othon (2015). FPGA implementation of a MIMO DFE in 40 GB/S DQPSK optical links. In: 2015 23rd European Signal Processing Conference (EUSIPCO). IEEE, 1581-1585.

MICHAIL, Harris E., ATHANASIOU, George S., KELEFOURAS, Vasileios, THEODORIDIS, George, STOURAITIS, Thanos and GOUTIS, Costas E. (2015). Area-throughput trade-offs for SHA-1 and SHA-256 hash functions’ pipelined designs. Journal of Circuits, Systems and Computers, 25 (04), p. 1650032.

KELEFOURAS, Vasileios, KRITIKAKOU, Angeliki, PAPADIMA, Elissavet and GOUTIS, Constantinos E. (2015). A methodology for speeding up matrix vector multiplication for single/multi-core architectures. Journal of Supercomputing, 71 (7), 2644-2667.

KELEFOURAS, Vasileios, KRITIKAKOU, Angeliki and GOUTIS, Costas (2015). A methodology for speeding up loop kernels by exploiting the software information and the memory architecture. Computer Languages Systems and Structures, 41, 21-41.

KELEFOURAS, Vasileios, KRITIKAKOU, Angeliki, SIOUROUNIS, Konstantinos and GOUTIS, Costas (2014). A Methodology for Speeding up MVM for Regular, Toeplitz and Bisymmetric Toeplitz Matrices. Journal of Signal Processing Systems, 77 (3), 241-255.

KELEFOURAS, Vasileios, KRITIKAKOU, Angeliki and GOUTIS, Costas (2014). A Matrix--Matrix Multiplication methodology for single/multi-core architectures using SIMD. The Journal of Supercomputing, 68 (3), 1418-1440.

KELEFOURAS, Vasileios, KRITIKAKOU, Angeliki and GOUTIS, Costas (2014). A methodology for speeding up edge and line detection algorithms focusing on memory architecture utilization. The Journal of Supercomputing, 68 (1), 459-487.

KRITIKAKOU, Angeliki, CATTHOOR, Francky, KELEFOURAS, Vasileios and GOUTIS, Costas (2014). A scalable and near-optimal representation of access schemes for memory management. ACM Transactions on Architecture and Code Optimization, 11 (1), 13:1-13:25.

EMERETLIS, Andreas, KELEFOURAS, Vasileios, THEODORIDIS, George and GLENTIS, Othon (2014). Efficient FPGA implementations of volterra DFES for optical systems. In: 2014 IEEE Dallas Circuits and Systems Conference (DCAS 2014) : Conference theme: Enabling an internet of things – from sensors to servers. Piscataway, NJ, IEEE.

KRITIKAKOU, Angeliki, CATTHOOR, Francky, KELEFOURAS, Vasileios and GOUTIS, Costas (2013). Near-optimal and Scalable Intrasignal In-place Optimization for Non-overlapping and Irregular Access Schemes. ACM Transactions on Design Automation of Electronic Systems, 19 (1), 4:1-4:30.

KRITIKAKOU, Angeliki, CATTHOOR, Francky, ATHANASIOU, George, KELEFOURAS, Vasileios and GOUTIS, Costas E. (2013). A template-based methodology for efficient microprocessor and FPGA accelerator co-design. In: 2012 International Conference on Embedded Computer Systems (SAMOS). IEEE, 15-22.

KRITIKAKOU, Angeliki, CATTHOOR, Francky, ATHANASIOU, George S., KELEFOURAS, Vasileios and GOUTIS, Costas (2013). Near-Optimal Microprocessor and Accelerators Codesign with Latency and Throughput Constraints. ACM Transactions on Architecture and Code Optimization, 10 (2), 6:1-6:25.

KRITIKAKOU, Angeliki, CATTHOOR, Francky, KELEFOURAS, Vasileios and GOUTIS, Costas (2013). A Systematic Approach to Classify Design-time Global Scheduling Techniques. ACM Computing Surveys, 45 (2), 14:1-14:30.

MICHAIL, Harris E., ATHANASIOU, George S., KELEFOURAS, Vasileios, THEODORIDIS, George and GOUTIS, Costas E. (2012). On the Exploitation of a High-throughput SHA-256 FPGA Design for HMAC. ACM Transactions on Reconfigurable Technology and Systems (TRETS), 5 (1), 2:1-2:28.

ALACHIOTIS, Nikolaos, KELEFOURAS, Vasileios, ATHANASIOU, George, MICHAIL, Harris E., KRITIKAKOU, Angeliki and GOUTIS, Costas E. (2012). A data locality methodology for matrix-matrix multiplication algorithm. The Journal of Supercomputing, 59 (2), 830-851.

KELEFOURAS, Vasileios, ATHANASIOU, George, ALACHIOTIS, Nikolaos, MICHAIL, Harris E., KRITIKAKOU, Angeliki and GOUTIS, Costas E. (2011). A methodology for speeding up fast fourier transform focusing on memory architecture utilization. IEEE Transactions on Signal Processing, 59 (12), 6217-6226.

MICHAIL, Harris, GREGORIADES, Andreas, ATHANASIOU, George, KELEFOURAS, Vasileios and GOUTIS, Costas (2010). Authentication with RIPEMD-160 and other alternatives: A Hardware Design Perspective. In: LAZINICA, Aleksandar, (ed.) New advanced technologies. INTECH, 103-124.

MICHAIL, Harris, GREGORIADES, Andreas, KELEFOURAS, Vasileios, KOTSIOLIS, Apostolis, PAPAGIANOPOULOU, Dimitra and GOUTIS, Costas (2010). HW/SW co-design integrating high – speed authentication module for IPSec/IPv6. In: PALEOLOGU, Constantin, (ed.) Proceedings. The fifth international conference on digital telecommunications ICDT 2010. 13-19 June 2010 Athens/Glyfada, Greece. Los Alamitos, California, Conference Publishing Services, IEEE Computer Society, 138-142.

MICHAIL, Harris, APOSTOLOPOULOU, Dimitra, ANASTASIOU, Lamprini, PORPODAS, Vasilis, ATHANASIOU, George, KELEFOURAS, Vasileios and GOUTIS, Costas (2008). Novel hardware implementation of the Cipher Message Authentication Code (CMAC). In: Oral Presentation in 1st Panhellenic Conference on Electronics and Telecommunications (PACET '08). (Unpublished)

This list was generated on Sat Sep 19 18:17:14 2020 UTC.